/*------------------------------------------------------------------------*/
/* SAMG53 : MMCv3/SDv1/SDv2 (SPI mode) control module                   */
/*------------------------------------------------------------------------*/
/*
/  Copyright (C) 2013, ChaN, all right reserved.
/
/ * This software is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/   personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-------------------------------------------------------------------------*/

/*--------------------------------------------------------------------------

   Module Private Functions

---------------------------------------------------------------------------*/
#include "sam.h"
#include "diskio.h"

#define DUMMY_WRITE_DATUM	0xFF
#define SPI_INSTANCE		SPI
#define CS_PORT				PIOA
#define CS_PIN				11
#define CD_PORT				NULL
#define CD_PIN				NULL
#define SPI_CLOCK_PRES_SLOW	60 // 400kHz (24MHz/60)
#define SPI_CLOCK_PRES_FAST 24 // 1MHz (24MHz/24)
#define	MMC_WP				0
#define	MMC_CD				1

/* MMC/SD command */
#define CMD0	(0)			/* GO_IDLE_STATE */
#define CMD1	(1)			/* SEND_OP_COND (MMC) */
#define	ACMD41	(0x80+41)	/* SEND_OP_COND (SDC) */
#define CMD8	(8)			/* SEND_IF_COND */
#define CMD9	(9)			/* SEND_CSD */
#define CMD10	(10)		/* SEND_CID */
#define CMD12	(12)		/* STOP_TRANSMISSION */
#define ACMD13	(0x80+13)	/* SD_STATUS (SDC) */
#define CMD16	(16)		/* SET_BLOCKLEN */
#define CMD17	(17)		/* READ_SINGLE_BLOCK */
#define CMD18	(18)		/* READ_MULTIPLE_BLOCK */
#define CMD23	(23)		/* SET_BLOCK_COUNT (MMC) */
#define	ACMD23	(0x80+23)	/* SET_WR_BLK_ERASE_COUNT (SDC) */
#define CMD24	(24)		/* WRITE_BLOCK */
#define CMD25	(25)		/* WRITE_MULTIPLE_BLOCK */
#define CMD32	(32)		/* ERASE_ER_BLK_START */
#define CMD33	(33)		/* ERASE_ER_BLK_END */
#define CMD38	(38)		/* ERASE */
#define CMD55	(55)		/* APP_CMD */
#define CMD58	(58)		/* READ_OCR */


static volatile DSTATUS Stat = STA_NOINIT;	/* Physical drive status */
static volatile UINT Timer1, Timer2;		/* 1kHz decrement timer stopped at zero (disk_timerproc()) */
static BYTE CardType;						/* Card type flags */



/*-----------------------------------------------------------------------*/
/* SPI controls (Platform dependent)                                     */
/*-----------------------------------------------------------------------*/

static CS_High (void){
	CS_PORT->PIO_SODR = (0x1 << CS_PIN);
}

static CS_Low (void){
	CS_PORT->PIO_CODR = (0x1 << CS_PIN);
}


/* Initialize MMC interface */
static void init_spi (void)
{	
	
	// Configure SPI Pins 
	PMC->PMC_PCER0 = PMC_PCER0_PID11;
	PIOA->PIO_PDR = ( PIO_PER_P12 | PIO_PER_P13 | PIO_PER_P14);
	PIOA->PIO_ABCDSR[0] = 0x00000000;
	PIOA->PIO_ABCDSR[1] = 0x00000000;
	
	// Enable SPI Clock
	PMC->PMC_PCER0 |= PMC_PCER0_PID21 ;
	//Enable SPI
	SPI_INSTANCE->SPI_CR |= SPI_CR_SPIEN;
	SPI_INSTANCE->SPI_MR |= SPI_MR_WDRBT;
	// Set Master Mode
	SPI_INSTANCE->SPI_MR |= SPI_MR_MSTR ;
	// Set CPOL CPHA
	SPI_INSTANCE->SPI_CSR[0] &= ~(SPI_CSR_CPOL);
	SPI_INSTANCE->SPI_CSR[0] |= SPI_CSR_NCPHA;

	SPI_INSTANCE->SPI_MR |= SPI_MR_MODFDIS;
	
	// Set frequency
	SPI_INSTANCE->SPI_CSR[0] |= SPI_CLOCK_PRES_SLOW << (SPI_CSR_SCBR_Pos);

	//Configure CS pin
	CS_PORT->PIO_PER = (0x1 << CS_PIN);
	CS_PORT->PIO_PUER = (0x1 << CS_PIN);
	CS_PORT->PIO_OER = (0x1 << CS_PIN);

	
}

/* Exchange a datum (byte)  */
static BYTE xchg_spi (BYTE datum)
{
	// wait until TX register empty (start of transfer)
	while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
	SPI_INSTANCE->SPI_TDR = datum;
	// wait until Rx Register full (end of transfer)
	while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
	return  SPI_INSTANCE->SPI_RDR ;
}

/* Receive multiple byte */
static void rcvr_spi_multi ( BYTE *Rxbuff, UINT nbrbyte	)
{
	// set tx/rx counters
	UINT tx_data_cnt = 0;
	UINT rx_data_cnt = 0;
	// exit function if nothing to receive
	if (!nbrbyte)
		return;
	
	if (nbrbyte != 1) {
		// wait until TX register empty
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
		// write first datum (start of transfer)
		SPI_INSTANCE->SPI_TDR = DUMMY_WRITE_DATUM;
		tx_data_cnt ++;
		// wait until TX register empty
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
		// write second datum
		SPI_INSTANCE->SPI_TDR = DUMMY_WRITE_DATUM;
		tx_data_cnt ++;
		while(tx_data_cnt < nbrbyte )
		{
			// Wait until current datum is received
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
			Rxbuff[rx_data_cnt++] = SPI_INSTANCE->SPI_RDR;
			// wait until TX register empty
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
			// write next datum to send
			SPI_INSTANCE->SPI_TDR = DUMMY_WRITE_DATUM;
			tx_data_cnt ++;
		}
		// wait until RX register full
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
		// read previous to last datum
		Rxbuff[rx_data_cnt++] = SPI_INSTANCE->SPI_RDR;
		// wait until RX register full
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
		// read previous last datum
		Rxbuff[rx_data_cnt++] = SPI_INSTANCE->SPI_RDR;
	} else {
		// wait until TX register empty (start of transfer)
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
		SPI_INSTANCE->SPI_TDR = DUMMY_WRITE_DATUM;
		// wait until Rx Register full (end of transfer)
		while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
		Rxbuff[0] = SPI_INSTANCE->SPI_RDR ;
	}
}


#if _USE_WRITE
	/* Send multiple byte */
	static void xmit_spi_multi ( const BYTE *Txbuff, UINT nbrbyte	)
	{
		UINT tx_data_cnt = 0;
		// exit function if nothing to write
		if (!nbrbyte)
		return;
		
		if (nbrbyte != 1) {
			// wait until TX register empty
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
			// write first datum (start of transfer)
			SPI_INSTANCE->SPI_TDR = Txbuff[tx_data_cnt++];
			// wait until TX register empty
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
			// write second datum
			SPI_INSTANCE->SPI_TDR = Txbuff[tx_data_cnt++];
			while(tx_data_cnt < nbrbyte )
			{
				// Wait until current datum is received
				while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
				SPI_INSTANCE->SPI_RDR;
				// wait until TX register empty
				while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
				// write next datum to send
				SPI_INSTANCE->SPI_TDR = Txbuff[tx_data_cnt++];
			}
			// wait until RX register full
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
			// read previous to last datum
			SPI_INSTANCE->SPI_RDR;
			// wait until RX register full
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
			// read previous last datum
			SPI_INSTANCE->SPI_RDR;
		} else {
			// wait until TX register empty (start of transfer)
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_TDRE));
			SPI_INSTANCE->SPI_TDR = Txbuff[0];
			// wait until Rx Register full (end of transfer)
			while(!(SPI_INSTANCE->SPI_SR & SPI_SR_RDRF));
			SPI_INSTANCE->SPI_RDR;
		}
	}
#endif


/*-----------------------------------------------------------------------*/
/* Wait for card ready                                                   */
/*-----------------------------------------------------------------------*/
/* function name :  wait_ready 
/* return : 1 if card ready 0 if timeout
/* parameters : wt timeout value in ms
*/ 

static int wait_ready (UINT Timeout)
{
	BYTE d;
	Timer2 = Timeout;
	do {
		d = xchg_spi(0xFF);
	} while (d != 0xFF && Timer2);	/* Wait for card goes ready or timeout */
	return (d == 0xFF) ? 1 : 0;
}



/*-----------------------------------------------------------------------*/
/* Deselect card and release SPI                                         */
/*-----------------------------------------------------------------------*/

static void deselect (void)
{
	CS_High();		/* CS = H */
	xchg_spi(0xFF);	/* Dummy clock (force DO hi-z for multiple slave SPI) */
}



/*-----------------------------------------------------------------------*/
/* Select card and wait for ready                                        */
/*-----------------------------------------------------------------------*/
/* 1:OK, 0:Timeout */
static int select (void)	
{
	CS_Low();
	xchg_spi(0xFF);	/* Dummy clock (force DO enabled) */
	if (wait_ready(500)) 
		return 1;	/* OK */
	deselect();
	return 0;	/* Timeout */
}



/*-----------------------------------------------------------------------*/
/* Receive a data packet from the MMC                                    */
/*-----------------------------------------------------------------------*/
/* 1:OK, 0:Error */
/* Data block length (byte)
/* Data block length (byte) */
static int rcvr_datablock (	 BYTE *buff, UINT btr)
{
	BYTE token;
	Timer1 = 200;
	do {							/* Wait for DataStart token in timeout of 200ms */
		token = xchg_spi(0xFF);
		/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
	} while ((token == 0xFF) && Timer1);
	if(token != 0xFE) return 0;		/* Function fails if invalid DataStart token or timeout */

	rcvr_spi_multi(buff, btr);		/* Store trailing data to the buffer */
	xchg_spi(0xFF); xchg_spi(0xFF);			/* Discard CRC */

	return 1;						/* Function succeeded */
}



/*-----------------------------------------------------------------------*/
/* Send a data packet to the MMC                                         */
/*-----------------------------------------------------------------------*/

#if _USE_WRITE

/* 1:OK, 0:Failed */
/* Ponter to 512 byte data to be sent */
/* Token */

static int xmit_datablock (const BYTE *buff, BYTE token	)
{
	BYTE resp;
	if (!wait_ready(500)) return 0;		 /* Wait for card ready */
	xchg_spi(token);					 /* Send token */
	if (token != 0xFD) {				 /* Send data if token is other than StopTran */
		xmit_spi_multi(buff, 512);		 /* Data */
		xchg_spi(0xFF); xchg_spi(0xFF);	 /* Dummy CRC */
		resp = xchg_spi(0xFF);			 /* Receive data resp */
		if ((resp & 0x1F) != 0x05)		 /* Function fails if the data packet was not accepted */
			return 0;
	}
	return 1;
}
#endif


/*-----------------------------------------------------------------------*/
/* Send a command packet to the MMC                                      */
/*-----------------------------------------------------------------------*/
/* Return value: R1 resp (bit7==1:Failed to send) */
/* Cmd : Command index */
/* arg : Argument */
static BYTE send_cmd ( BYTE cmd, DWORD arg ) 
{
	BYTE n, res;
    /* Send a CMD55 prior to ACMD<n> */
	if (cmd & 0x80) {	
		cmd &= 0x7F;
		res = send_cmd(CMD55, 0);
		if (res > 1) return res;
	}

	/* Select the card and wait for ready except to stop multiple block read */
	if (cmd != CMD12) {
		deselect();
		if (!select()) return 0xFF;
	}

	/* Send command packet */
	xchg_spi(0x40 | cmd);				/* Start + command index */
	xchg_spi((BYTE)(arg >> 24));		/* Argument[31..24] */
	xchg_spi((BYTE)(arg >> 16));		/* Argument[23..16] */
	xchg_spi((BYTE)(arg >> 8));			/* Argument[15..8] */
	xchg_spi((BYTE)arg);				/* Argument[7..0] */
	n = 0x01;							/* Dummy CRC + Stop */
	if (cmd == CMD0) n = 0x95;			/* Valid CRC for CMD0(0) */
	if (cmd == CMD8) n = 0x87;			/* Valid CRC for CMD8(0x1AA) */
	xchg_spi(n);

	/* Receive command resp */
	if (cmd == CMD12) xchg_spi(0xFF);	/* Diacard following one byte when CMD12 */
	n = 10;								/* Wait for response (10 bytes max) */
	do
		res = xchg_spi(0xFF);
	while ((res & 0x80) && --n);

	return res;							/* Return received response */
}



/*--------------------------------------------------------------------------

   Public Functions

---------------------------------------------------------------------------*/


/*-----------------------------------------------------------------------*/
/* Initialize disk drive                                                 */
/*-----------------------------------------------------------------------*/
/* drv : Physical drive number (0) */
DSTATUS disk_initialize ( BYTE drv )
{
	BYTE n, cmd, ty, ocr[4];

	if (drv) return STA_NOINIT;			/* Supports only drive 0 */
	init_spi();							/* Initialize SPI */
	if (Stat & STA_NODISK) return Stat;	/* Is card existing in the socket? */
	// Set frequency
	SPI_INSTANCE->SPI_CSR[0] |= SPI_CLOCK_PRES_SLOW << (SPI_CSR_SCBR_Pos);
	/* Send 80 dummy clocks */
	for (n = 10; n; n--) xchg_spi(0xFF);	
	CardType = 0;
	if (send_cmd(CMD0, 0) == 1) {			/* Put the card SPI/Idle state */
		Timer1 = 1000;						/* Initialization timeout = 1 sec */
		if (send_cmd(CMD8, 0x1AA) == 1) {	/* SDv2? */
			for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);	/* Get 32 bit return value of R7 resp */
			if (ocr[2] == 0x01 && ocr[3] == 0xAA) {				/* Is the card supports vcc of 2.7-3.6V? */
				while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ;	/* Wait for end of initialization with ACMD41(HCS) */
				if (Timer1 && send_cmd(CMD58, 0) == 0) {		/* Check CCS bit in the OCR */
					for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
					CardType = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;	/* Card id SDv2 */
				}
			}
		} else {	/* Not SDv2 card */
			if (send_cmd(ACMD41, 0) <= 1) 	{	/* SDv1 or MMC? */
				CardType = CT_SD1; cmd = ACMD41;	/* SDv1 (ACMD41(0)) */
			} else {
				CardType = CT_MMC; cmd = CMD1;	/* MMCv3 (CMD1(0)) */
			}
			while (Timer1 && send_cmd(cmd, 0)) ;		/* Wait for end of initialization */
			if (!Timer1 || send_cmd(CMD16, 512) != 0)	/* Set block length: 512 */
				CardType = 0;
		}
	}
	deselect();
	if (ty) {					
		/* Set fast clock */
		// Set frequency
		SPI_INSTANCE->SPI_CSR[0] |= SPI_CLOCK_PRES_FAST << (SPI_CSR_SCBR_Pos);			
		/* Clear STA_NOINIT flag */
		Stat &= ~STA_NOINIT;	
	} else {
		/* Failed */					
		Stat = STA_NOINIT;
	}
	return Stat;
}



/*-----------------------------------------------------------------------*/
/* Get disk status                                                       */
/*-----------------------------------------------------------------------*/
/* Physical drive number (0) */
/* Supports only drive 0 */
/* Return disk status */

DSTATUS disk_status (BYTE drv)
{
	if (drv) 
		return STA_NOINIT;		
	return Stat;	
}

/*-----------------------------------------------------------------------*/
/* Read sector(s)                                                        */
/*-----------------------------------------------------------------------*/
/* Physical drive number (0) */
/* Pointer to the data buffer to store read data */
/* Start sector number (LBA) */
/* Number of sectors to read (1..128) */

DRESULT disk_read (BYTE drv, BYTE *buff, DWORD sector,	UINT count)
{
	if (drv || !count) return RES_PARERR;		/* Check parameter */
	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check if drive is ready */

	if (!(CardType & CT_BLOCK)) sector *= 512;	/* LBA ot BA conversion (byte addressing cards) */

	if (count == 1) {	/* Single sector read */
		if ((send_cmd(CMD17, sector) == 0)	/* READ_SINGLE_BLOCK */
			&& rcvr_datablock(buff, 512))
			count = 0;
	}
	else {				/* Multiple sector read */
		if (send_cmd(CMD18, sector) == 0) {	/* READ_MULTIPLE_BLOCK */
			do {
				if (!rcvr_datablock(buff, 512)) break;
				buff += 512;
			} while (--count);
			send_cmd(CMD12, 0);				/* STOP_TRANSMISSION */
		}
	}
	deselect();

	return count ? RES_ERROR : RES_OK;	/* Return result */
}



/*-----------------------------------------------------------------------*/
/* Write sector(s)                                                       */
/*-----------------------------------------------------------------------*/

#if _USE_WRITE
DRESULT disk_write (
	BYTE drv,			/* Physical drive number (0) */
	const BYTE *buff,	/* Ponter to the data to write */
	DWORD sector,		/* Start sector number (LBA) */
	UINT count			/* Number of sectors to write (1..128) */
)
{
	if (drv || !count) return RES_PARERR;		/* Check parameter */
	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check drive status */
	if (Stat & STA_PROTECT) return RES_WRPRT;	/* Check write protect */

	if (!(CardType & CT_BLOCK)) sector *= 512;	/* LBA ==> BA conversion (byte addressing cards) */

	if (count == 1) {	/* Single sector write */
		if ((send_cmd(CMD24, sector) == 0)	/* WRITE_BLOCK */
			&& xmit_datablock(buff, 0xFE))
			count = 0;
	}
	else {				/* Multiple sector write */
		if (CardType & CT_SDC) send_cmd(ACMD23, count);	/* Predefine number of sectors */
		if (send_cmd(CMD25, sector) == 0) {	/* WRITE_MULTIPLE_BLOCK */
			do {
				if (!xmit_datablock(buff, 0xFC)) break;
				buff += 512;
			} while (--count);
			if (!xmit_datablock(0, 0xFD))	/* STOP_TRAN token */
				count = 1;
		}
	}
	deselect();

	return count ? RES_ERROR : RES_OK;	/* Return result */
}
#endif


/*-----------------------------------------------------------------------*/
/* Miscellaneous drive controls other than data read/write               */
/*-----------------------------------------------------------------------*/

#if _USE_IOCTL
DRESULT disk_ioctl (
	BYTE drv,		/* Physical drive number (0) */
	BYTE cmd,		/* Control command code */
	void *buff		/* Pointer to the conrtol data */
)
{
	DRESULT res;
	BYTE n, csd[16];
	DWORD *dp, st, ed, csize;


	if (drv) return RES_PARERR;					/* Check parameter */
	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check if drive is ready */

	res = RES_ERROR;

	switch (cmd) {
	case CTRL_SYNC :		/* Wait for end of internal write process of the drive */
		if (select()) res = RES_OK;
		break;

	case GET_SECTOR_COUNT :	/* Get drive capacity in unit of sector (DWORD) */
		if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
			if ((csd[0] >> 6) == 1) {	/* SDC ver 2.00 */
				csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
				*(DWORD*)buff = csize << 10;
			} else {					/* SDC ver 1.XX or MMC ver 3 */
				n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
				csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
				*(DWORD*)buff = csize << (n - 9);
			}
			res = RES_OK;
		}
		break;

	case GET_BLOCK_SIZE :	/* Get erase block size in unit of sector (DWORD) */
		if (CardType & CT_SD2) {	/* SDC ver 2.00 */
			if (send_cmd(ACMD13, 0) == 0) {	/* Read SD status */
				xchg_spi(0xFF);
				if (rcvr_datablock(csd, 16)) {				/* Read partial block */
					for (n = 64 - 16; n; n--) xchg_spi(0xFF);	/* Purge trailing data */
					*(DWORD*)buff = 16UL << (csd[10] >> 4);
					res = RES_OK;
				}
			}
		} else {					/* SDC ver 1.XX or MMC */
			if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {	/* Read CSD */
				if (CardType & CT_SD1) {	/* SDC ver 1.XX */
					*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
				} else {					/* MMC */
					*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
				}
				res = RES_OK;
			}
		}
		break;

	case CTRL_ERASE_SECTOR :	/* Erase a block of sectors (used when _USE_ERASE == 1) */
		if (!(CardType & CT_SDC)) break;				/* Check if the card is SDC */
		if (disk_ioctl(drv, MMC_GET_CSD, csd)) break;	/* Get CSD */
		if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break;	/* Check if sector erase can be applied to the card */
		dp = buff; st = dp[0]; ed = dp[1];				/* Load sector block */
		if (!(CardType & CT_BLOCK)) {
			st *= 512; ed *= 512;
		}
		if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000))	/* Erase sector block */
			res = RES_OK;	/* FatFs does not check result of this command */
		break;

	default:
		res = RES_PARERR;
	}

	deselect();

	return res;
}
#endif


/*-----------------------------------------------------------------------*/
/* Device timer function                                                 */
/*-----------------------------------------------------------------------*/
/* This function must be called from timer interrupt routine in period
/  of 1 ms to generate card control timing.
*/

void disk_timerproc (void)
{
	WORD n;
	BYTE s;

	//n = Timer1;						/* 1kHz decrement timer stopped at 0 */
	//if (n) Timer1 = --n;
	//n = Timer2;
	//if (n) Timer2 = --n;

	s = Stat;
	if (MMC_WP)		/* Write protected */
		s |= STA_PROTECT;
	else		/* Write enabled */
		s &= ~STA_PROTECT;
	if (MMC_CD)	/* Card is in socket */
		s &= ~STA_NODISK;
	else		/* Socket empty */
		s |= (STA_NODISK | STA_NOINIT);
	Stat = s;
}

